A+ Certification / Beginners

Identifying the Types of DRAM

Dynamic RAM (DRAM) is the most popular type of memory used in systems today. It is also the most popular type of memory that computer users add to their computers for the purpose of upgrading memory. Therefore, you must understand the different types of DRAM and what types of DRAM outperform others.

Standard DRAM

Memory is organized into rows and columns, like a spreadsheet. The information is stored in the different cells, or blocks, that are created by the intersection of these rows and columns. With standard DRAM, the CPU requests data by sending the address of the row and the address of the column for every block of data that needs to be read to the memory controller. The memory controller then fetches the information from that memory location. Figure below shows two memory cells that hold data that the CPU wants to have.

Looking at how data is accessed in memory

To access the information shown in Figure above, the CPU follows these basic steps to request information from standard DRAM:

  1. In the first clock cycle, it sends the row address (1).
  2. In the second clock cycle, it sends the column address (2).
  3. On the third clock cycle, the memory controller reads the information (Address 1-2).
  4. In the fourth clock cycle, the row address for the second memory cell is given (1).
  5. In the fifth clock cycle, the column address for the second memory cell is given (4).
  6. In the sixth clock cycle, the second memory cell is read (Address 1-4).

Fast page mode

Fast Page Mode (FPM) improves the performance of standard DRAM by not requiring a row address for each request to memory, assuming that the next block of data is on the same row (which in most cases will be true). The following list outlines the basic steps to access the same two blocks of data shown in Figure via fast page mode memory:

  1. In the first clock cycle, the CPU sends the row address (1).
  2. In the second clock cycle, it sends the column address (2).
  3. On the third clock cycle, the memory controller reads the information (Address 1-2).
  4. In the fourth clock cycle, the column address is given (4).
  5. In the fifth clock cycle, the second cell address is read (Address 1-4).

You can see in this example that it takes less time to read both blocks of data from memory with fast page mode DRAM. Therefore, FPM memory is a faster DRAM memory type than standard.

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